GaAs and related compound semiconductor (hereinafter referred to as GaAs series) devices and InP and related compound semiconductor (hereinafter referred to as InP series) devices have been extensively employed as high-frequency elements in heterojunction bipolar transistors and field effect transistors and as optical elements in laser diodes because the mobility of electrons in these compound semiconductor is higher than that in Si and charge carrier transitions in the compounds are direct interband transitions.
However, GaAs (InP) series semiconductor devices have a disadvantage in that the heat conductivity of GaAs (InP) is lower than Si. Basic physical properties of representative semiconductors are shown in table 1. As can be seen from the table 1, the heat conductivities of GaAs and InP are lower than the heat conductivities of GaP and Si.
TABLE 1 ______________________________________ Substance Heat Thermal Conductivity Lattice Crystal Expansion (Resistivity) Constant Structure Coefficient Unit W/cmK Substance (cmK/W) .ANG. -- 1/K ______________________________________ GaAs 0.54 5.6533 Zincblende 5.7 .times. 10.sup.-6 (1.852) InP 0.70 5.8688 Zincblende 4.5 .times. 10.sup.-6 (1.429) GaP 1.10 5.4511 Zincblende 4.7 .times. 10.sup.-6 (0.909) Si 1.57 5.4301 Diamond 2.4 .times. 10.sup.-6 (0.637) ______________________________________
Generally, the heat dissipation property of a device depends on its heat resistance, and the heat resistance of a substance is represented by a rise in temperature (unit: K) per unit heat flow (unit: Joule/sec=Watt). The heat resistance is equal to (heat resistivity).times.(length of the substance)/(cross section of the substance). The heat resistivity is the reciprocal of heat conductivity. When a GaAs (InP) series semiconductor device, such as a heterojunction bipolar transistor, a field effect transistor, or a laser diode, is used as a high-power device, it is necessary to flow a high d.c. current flow through the device. However, since the power efficiency of the device is lower than unity, a certain ratio of power applied to the device is consumed as heat. At this time, as the heat resistance of the heat transfer path in the device becomes high, the difference in temperature between both ends of the heat transfer path becomes large, which means that the temperature of the device itself rises, resulting in a degradation of the device characteristics and a reduction of the reliability of the device.
In order to avoid the temperature rise, if the power efficiency is constant, it is necessary to lower the heat resistance by reducing the length of the heat transfer path or by increasing the heat conductivity, i.e., lowering the heat resistivity, of a material in the heat transfer path. More specifically, the following methods are employed.
(1) A GaAs (InP) substrate is thinned, and a plate for absorbing and dissipating heat made of a metal or the like having a high heat conductivity is disposed on the rear surface of the substrate. This plate is called a plated heat sink (referring to PHS hereinafter).
(2) A substrate comprising a crystalline material having a high heat conductivity, such as GaP or Si, is employed, and GaAs series (InP series) crystalline layers for producing elements are grown on the substrate.
Basically, method (1) is for shortening the heat transfer path and method (2) is for increasing the heat conductivity of a material in the heat transfer path.
An example of method (1) in which a GaAs substrate having a low heat conductivity is thinned by grinding and a metal or the like having a high heat conductivity is plated on the rear surface of the substrate to make a PHS will be described in more detail. A series of steps of this method are shown in FIGS. 7(a)-7(c). First of all, a semiconductor layer 43 about 2 .mu.m thick, which is a constituent of a high-power device, such as a heterojunction bipolar transistor, is grown on a GaAs substrate 1 about 600 .mu.m thick. Although in FIG. 7(a) the semiconductor layer 43 is illustrated as a single layer, it comprises an active layer and a buffer layer. Thereafter, the substrate is attached to a glass plate 6 using wax 8 (FIG. 7(a)). The glass plate 6 is in contact with the semiconductor layer 43. Then, the GaAs substrate 1 is grounded until its thickness becomes about 30 .mu.m or less and a PHS 9 for heat dissipation is plated (FIG. 7(b)). Finally, the GaAs substrate 1 is separated from the glass plate 6 (FIG. 7(c)). According to this method, however, it is difficult to maintain preferable uniformity of the thickness of the ground substrate, and the mechanical strength of the substrate is lowered, whereby the process steps after the grinding step become unstable.
On the other hand, according to the above-described method (2) in which a semiconductor layer 43, which is a constituent of a high-power device, is grown on a substrate 45 comprising a crystalline material having a high heat conductivity, such as GaP or Si, since the lattice constant, the thermal expansion coefficient, and the crystal structure of the semiconductor layer 43 are different from those of the substrate 45, it is difficult to obtain a semiconductor layer 43 with preferable crystallinity. In fact, as shown in the table 1, the lattice constants, the thermal expansion coefficients, and the crystal structures of GaAs and InP are different from those of GaP and Si.
Besides the above-described methods (1) and (2), a method disclosed in Japanese Published Patent Application No. Hei. 1-304722 is known. A series of process steps of this method are shown in FIGS. 9(a)-9(c). In this method, a semiconductor substrate 51 on which a device is later fabricated is directly bonded to a substrate 55 comprising a material having a high heat conductivity (FIGS. 9(a)-9(b)) and, thereafter, the semiconductor substrate 51 is ground or etched to a predetermined thickness (FIG. 9(c)), followed by fabrication of the device. According to this method, degradation of crystallinity of semiconductor layers grown on the semiconductor substrate 51 is prevented. However, after the direct bonding of the semiconductor substrate 51 to the substrate 55, it is difficult to maintain the uniformity of the thickness of the semiconductor substrate 51 when it is ground or etched. Likewise, there is a problem in reproducibility. In addition, it is impossible to make the semiconductor substrate 51 thinner than the deviation of the thickness of the substrate 51. The thinner the substrate is, the better the heat dissipation property is. However, in the above respect, there is a limit in improvement of the heat dissipation property in this method.
In order to improve the heat dissipation property of the high-power GaAs (InP) series semiconductor device and suppress unwanted rise in the temperature of the device, there have been the above-described methods, that is, method (1) in which a GaAs (InP) substrate 1 is thinned and a PHS 9 having a high heat conductivity is disposed on the rear surface of the substrate 1, and method (2) in which a substrate 45 comprising a crystalline material having a high heat conductivity is prepared and a GaAs (InP) series crystalline layer 43 which is a constituent of a device is grown on the substrate 45. However, according to method (1), it is difficult to grind the GaAs substrate 1 while maintaining uniformity of the thickness, and a sufficient mechanical strength of the wafer cannot be obtained after the grinding, so that the subsequent steps are not stably performed. According to the method (2), since lattice constant, the thermal expansion coefficient, and the crystal structure of the material of the substrate 45 are different from those of the semiconductor layer 43, the crystallinity of the semiconductor layer 43 is poor. On the other hand, according to the method in which a semiconductor substrate 51 on which semiconductor layers as constituents of a device are later produced is directly bonded to a substrate 55 having a high heat conductivity, although degradation of the crystallinity of the semiconductor layers is avoided, it is difficult to maintain uniformity and reproducibility of the thickness of the semicondutor substrate 51 when the substrate 51 is ground or etched after the bonding. In addition, it is impossible to make the semiconductor substrate 51 thinner than the deviation of the thickness. Accordingly, there is a limit in the improvement of the heat dissipation property.